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Journal of the Microelectronic Engineering Conference
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Home > RITAMEC > Vol. 9 (1999) > Iss. 1

 

Microelectronic Engineering Conference 1999

Papers

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I-Line Exposure Capability for 6 Inch Wafers
Jerome Wandell

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Critical Dimension Analysis on the RIT Canon i-line Stepper
Justin Novak

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Amorphous Silicon for 157nm Lithography
Carlos Fonseca

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Resist Characterization for 157nm Lithography
Christopher Bolton

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Oxidation Kinetics of Nitrogen Implanted Silicon
Nathaniel E. Wescott

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Plasma Induced Damage to Thin Gate Oxides
Dustin L. Winters

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Oxide Passivated Nanocrystalline Silicon Trap-Controlled memory Devices
Burcay Gurcan

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Integration of SiGe Resonant Interband tunneling Diodes with RIT CMOS
Petya Vachranukunkiet

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Development of an Anisotropic, Highly Selective Tungsten Silicide Dry Etch Process
Thomas Schulte

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Electrolytic Plating of Copper for Advanced Interconnects
Michael T. Myszka

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Pattern Density Effects on the Chemical Mechanical Planarization of an Interlevel Polymer Dielectric
Teresa M. Evans

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8 Bit Analog-to-Digital Converter Design and Simulation
Alberto J. Reyes

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Fabrication and Development of a Charge Injection Device Imager
Ivan Puchades

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Oxide Passivated Nanocrystalline Silicon LED Optimization
Tina M. Wheaton

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Investigation of a Silicon Bulk Etched Incandescent Light Source
Keith A. Roehner

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Silicon Based Light Emission by Avalanche Breakdown of Shallow p+/n+ Junctions
Peter I. Ritchie

 
 
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