Abstract
Understanding of quantum tunneling phenomenon in semiconductor systems is increasingly important as CMOS replacement technologies are investigated. This work studies a variety of heterojunction materials and types to increase tunnel currents to CMOS competitive levels and to understand how integration onto Si substrates affects performance. Esaki tunnel diodes were grown by Molecular Beam Epitaxy (MBE) on Si substrates via a graded buffer and control Esaki tunnel diodes grown on lattice matched substrates for this work. Peak current density for each diode is extracted and benchmarked to build an empirical data set for predicting diode performance. Additionally, statistics are used as tool to show peak to valley ratio for the III-V on Si sample and the control perform similarly below a threshold area. This work has applications beyond logic, as multijunction solar cell, heterojunction bipolar transistor, and light emitting diode designs all benefit from better tunnel contact design.
Library of Congress Subject Headings
Tunnel diodes--Testing; Metal oxide semiconductors, Complementary
Publication Date
6-9-2015
Document Type
Dissertation
Student Type
Graduate
Degree Name
Microsystems Engineering (Ph.D.)
Department, Program, or Center
Microsystems Engineering (KGCOE)
Advisor
Sean L. Rommel
Advisor/Committee Member
Santosh Kurinec
Advisor/Committee Member
Seth Hubbard
Recommended Citation
Thomas, Paul M., "Performance Evaluation of III-V Hetero/Homojunction Esaki Tunnel Diodes on Si and Lattice Matched Substrates" (2015). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/8740
Campus
RIT – Main Campus
Plan Codes
MCSE-PHD
Comments
Physical copy available from RIT's Wallace Library at TK7871.87 .T46 2015