Abstract

Scaling of semiconductor devices has become a challenge with respect to the design, device performance, reliability, integration and fabrication schemes. For over sixty-years now, from the first design of transistor various challenges has been overcome with various integration schemes to shrink the device whilst increasing the device performance. As the devices are shrinking, there is a need to achieve shallow junctions for better performance of non-planar structures such as FinFETs and 3D FETs. The implementation of conventional doping technique ion-implantation can be a hindering process for the shallow junctions as they tend to damage the crystal due to bombardment of high energy beams. Monolayer doping can be an alternative doping technique as the chemicals react with the semiconductor surface enabling a self-assembled and self-limiting process. MLD exploits the surface reaction properties of the crystalline semiconductors to form covalently bonded, self-assembled dopant molecular monolayers on the semiconductor surface with high doping concentrations.

Monolayer doping is implemented to fabricate Recessed Channel MOSFETs which are successful in suppressing the short channel effects by having the channel engineered by implementing the recessed channel grooves which have the potential of reducing the corner barrier effect in comparison to a standard classical planar MOSFET. The subthreshold slope of a 10 µm planar NMOSFET previously fabricated at R.I.T was 150mV/dec, whereas for a 10 µm recessed channel MOSFET fabricated in this work was 117.65mV/dec. The threshold voltage of the 10 µm planar NMOSFET was -0.3V whereas the threshold voltage of the 10 µm recessed channel MOSFETs was 0.2V.

The smallest working Recessed Channel MOSFETs fabricated had a channel length of 1 µm. Various integration schemes can be adopted to further investigate and fabricate recessed channel MOSFETs to show better device performance.

Library of Congress Subject Headings

Semiconductor doping; Metal oxide semiconductor field-effect transistors--Design and construction; Monomolecular films

Publication Date

11-2019

Document Type

Thesis

Student Type

Graduate

Degree Name

Microelectronic Engineering (MS)

Department, Program, or Center

Microelectronic Engineering (KGCOE)

Advisor

Santosh Kurinec

Advisor/Committee Member

Sean Rommel

Advisor/Committee Member

Ivan Puchades

Campus

RIT – Main Campus

Plan Codes

MCEE-MS

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