The HIT Factory is currently in the development phase for a 6 inch sub-micron CMOS process. The addition of the Canon FPA-2000i1 stepper completes the necessary equipment required to perform a 6 inch photo process at HiT. The major focus of this project is to further the 6 inch photo process development, specifically to setup the exposure process for the first two levels (p-well and active) of the HIT test chip. TV pre-align mark number 2 and auto-align mark 20P-4F were added to all eleven levels of the HIT test chip layout around the originally designed pattern~ area. The revised well and active designs were fabricated on a single mask, along with the Canon FRA marks. Six files were written and linked to the job files F9S3TC_WELL and F983TC_ACT, which can be nm to perform the well and active exposures respectively. Well exposure is complete and tested; however, the active exposure will not align to the well pattern. This is most likely due to an error in the active level job and related data files.
"I-Line Exposure Capability for 6 Inch Wafers,"
Journal of the Microelectronic Engineering Conference: Vol. 9:
1, Article 1.
Available at: https://repository.rit.edu/ritamec/vol9/iss1/1