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Authors

John F. Bonaker

Publication Date

1988

Document Type

Paper

Abstract

A four-bit ALU chip based on a metal gate PMOS process and 10-urn minimum geometries was designed. The operations performed by the ALU included ADD w/carry, SUBTRACT(2’s complement), INCREMENT, DECREMENT, and the logic functions AND, OR, XOR, and COMPLEMENT. Due to space limitations no data or shift registers were included on the chip. PMOS NOR gates and inverters were used in the hardware Implementation of the logic design. The ALU chip was laid out by using the ICE (Integrated Circuit Editor) design tool.

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