In this study, a new process for the fabrication of porous nanocrystalline silicon (pnc-Si) membranes is proposed, and the early stages in the development of an empirical, stressbased model for tunable porosity are revealed. Pnc-Si membranes that were fabricated by the proposed process showed substantial improvements in membrane morphology, i.e., porosity and pore uniformity across the wafer. These improvements were assumed to be related to stress, as suggested by the addition of materials that differ in Young’s Modulus and in coefficients of thermal expansion. In order to explore this assumption, stress measurements were conducted via stylus trace on a Tencor P2 Profilometer. Extensive average stress (dynes/cm2) measurements were performed by varying thermal and RF Magnetron sputtered Si02 thickness on bare, 400 μm thick, <100> orientation, double-sided polished silicon wafers. It was found that the stress-profile differences between the standard and proposed processes were significant as the change in the wafer bow (due to film stress), across the wafer (relative to the bare substrate), were plotted for varied oxide thickness during the three major stages of pnc-Si development. The resulting plots were 2nd order polynomials (best-fit RMS ≅ .970- .999), which agree with the form given by Stoney’s equation for macro stress acting in a coating deposited on a thick substrate. These differences have been consistent in multiple experiments and are currently being evaluated for their role in membrane porosity.
DesOrmeaux, Jon-Paul S.
"Developing an Empirical Model for Tunable Porosity in Porous Nanocrystalline Silicon Membranes,"
Journal of the Microelectronic Engineering Conference: Vol. 17:
1, Article 3.
Available at: https://repository.rit.edu/ritamec/vol17/iss1/3