Formation of Self-Aligned Shallow Junction MOSFET Source/Drains by Proximity Rapid Thermal Diffusion
Publication Date
2006
Document Type
Paper
Abstract
The creation of short-channel length MOSFET's requires shallow junctions and thin gate dielectrics to maintain long channel behavior. The Focus of this paper is the creation of shallow source/drain junctions by Proximity Diffusion with Rpid Thermal Processing (RTP_. PMOS devices were fabricated using Borofilm 100 Spin on Dopant with temperatures pf 950° and 1000° for 10 and 20 seconds ramped at 30 degrees per second. The source and drain regions are defined by the patterned polysilicon gate, which is also doped during this process. A 100 A gate oxide is used, incorporating nitrogen to reduce boron diffusion through the gate. The devices were tested and working transistors were found down to 0.6 micron mask defined gate lengths. The threshold voltage for these devices was found to be -3.1 Volts. Samples sent out for analysis by Secondary Ion Mass Spectrometry (SIMS) to profile the boron diffusion. The approximate junction depth was found to be between 30 and 40 A for the sample ran at 950° C for 10 seconds.
Recommended Citation
Kenny, Scott W.
(2006)
"Formation of Self-Aligned Shallow Junction MOSFET Source/Drains by Proximity Rapid Thermal Diffusion,"
Journal of the Microelectronic Engineering Conference: Vol. 16:
Iss.
1, Article 3.
Available at:
https://repository.rit.edu/ritamec/vol16/iss1/3