A major area of research for integrated electronic systems is the development of systems on glass or plastic to optimize the performance/cost tradeoff. These new substrate materials impose significant constraints on electronic device fabrication, including limitations on chemical and thermal processes. Processes that do not use high temperatures have the increased flexibility needed to be used on new substrate materials. Amorphous silicon thin-film transistors (TFTs) have been fabricated at temperatures below 300°C, where in-situ doped layers are deposited to form the electrode regions. Unfortunately, the electrical activation and carrier mobility in these devices is exceedingly low. The conventional method of adding impurities is ion implantation. Interstitial impurities cannot contribute to conductivity, therefore electrical activation is critical for device operation. ‘When a substrate is implanted with ions, the ions will break up the ordered crystal lattice and induce damage in the substrate. Annealing is a thermal process that serves two purposes, to recrystallize the substrate, and electrically activate dopant ions. While dopant activation at T < 300°C is not possible, anneals done at temperatures below 650°C can be quite effective. The goal of this project is to investigate methods of activating dopants without using the high temperature processes of conventional CMOS. A designed experiment is setup to investigate annealing behavior at low temperatures (T S 650°C). Temperatures centered on 600°C are the focus of this design. Additional factors are investigated including annealing time, ion species, annealing technique (furnace or rapid thermal processing), and the use of pre-amorphization implants.
"Low Temperature Dopant Activation,"
Journal of the Microelectronic Engineering Conference: Vol. 15:
1, Article 11.
Available at: https://repository.rit.edu/ritamec/vol15/iss1/11