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Authors

James C. Taylor

Publication Date

1987

Document Type

Paper

Abstract

To allow for a quicker, more efficient design process, a PMOS standard cell library has been designed. The cells designed include; NAND, AND, OR, NOR and Exclusive OR gates, Output Pad Driver, RS Flip-Flop, D-type Flip-Flop, Shift Register, Up-Down Counter, Multiplexor, Decoder, Encoder, Inverter, and a Serial Adder. These cells were all simulated using SPICE, and laid out with ten micron metal gate PMOS design rules.

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Engineering Commons

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