Abstract

The aim of this thesis is to develop and study the performance of an algorithm to perform blind estimation of Alamouti space-time coding (STC) on Zedboard’s ARM core and FPGA, and propose improvements based on the collected data. In the first part, previous methods to accomplish blind estimation of Alamouti STC are presented, and a new method that is simple enough for hardware implementation is proposed. The system of linear equations in the final step of the proposed method is not mathematically solvable. Hence, in the next part, the thesis proposes a method to accomplish partial blind estimation of Alamouti STC, that is suitable for fixed-point implementation. The new method for partial blind estimation is then implemented on ARM core and FPGA. The FPGA implementation is performed in three modes - power optimization, runtime optimization and area optimization. In conclusion, the thesis draws common observations from the data collected from simulations, ARM and FPGA implementations of the proposed method, to find its drawbacks. The performance data from the two hardware implementations are studied to compare the two methods, and find their advantages and disadvantages. This thesis hopes to offer researchers in the area of blind estimation, what is needed to develop a feasible method of accomplishing blind estimation of Alamouti STC, and what is to be expected from implementing the same on hardware.

Library of Congress Subject Headings

Space time codes; Software radio

Publication Date

12-15-2016

Document Type

Thesis

Student Type

Graduate

Degree Name

Telecommunications Engineering Technology (MS)

Department, Program, or Center

Electrical, Computer and Telecommunications Engineering Technology (CAST)

Advisor

Miguel Bazdresch

Advisor/Committee Member

Drew Maywar

Advisor/Committee Member

Steven Ciccarelli

Comments

Physical copy available from RIT's Wallace Library at TK5103.4877 .P44 2016

Campus

RIT – Main Campus

Plan Codes

TCET-MS

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