Abstract
A data flow computer is a highly concurrent and asynchronous multiprocessor due to its fundamentally new architecture. It has no program counter and is not sequential. Instructions execute whenever their operands are available to them. Because of this data-activated instruction execution, multiple instructions can execute concurrently. The project for this thesis was the simulation of a data flow computer. A graph language and machine language were defined; then a simulator was written which reads and executes a machine language program in the asynchronous and concurrent manner of a data flow computer.
Publication Date
4-2-1985
Document Type
Thesis
Student Type
Graduate
Degree Name
Computer Science (MS)
Department, Program, or Center
Computer Science (GCCIS)
Advisor
John Ellis
Advisor/Committee Member
Lawrence Coon
Advisor/Committee Member
Peter Lutz
Recommended Citation
Torsone, Carol, "Simulation of a data flow computer" (1985). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/915
Campus
RIT – Main Campus
Comments
Physical copy available from RIT's Wallace Library at QA76.9.C65 T67 1985