Abstract
The Flicker or 1// noise dominates the noise spectrum at low frequency. A serious concern for MOSFETs for circuit application is much higher flicker (1//) noise because of the heterogeneous interface between silicon (Si) and silicon dioxide (Si02). Very high intrinsic flicker noise of CMOS transistors becomes a drawback for low-Intermediate Frequency (IF) or direct-conversion architectures. In spite of extensive research and efforts to understand the low-frequency noise origin in semiconductor devices, there exists no unique theory to explain the low-frequency noise generation mechanism. Flicker noise in MOSFETs is usually perceived to be caused by carrier density fluctuations, which is result of interaction of free carriers with oxide traps via interface states. The most widely accepted theories to explain the flicker noise generation mechanism in MOSFETs are the number fluctuation model proposed by McWhorter based on the tunneling transitions between traps in the oxide and channel carriers, and the mobility fluctuation model, which is described by Hooge's empirical relation. Correlated low frequency noise models, which incorporate both the number fluctuation and correlated surface mobility fluctuation, have also been studied. This work presents a physics-based, analytical model for low-frequency or 1// noise in single- and double-gate MOSFETs. The model is an extension of a correlated low frequency noise model. The developed model takes into account the effects of quantization in the silicon channel, short channel characteristics of the device, and effective trap levels contributing to lowfrequency noise generation mechanism. The inclusion of quantum effects is based on a self-consistent solution of Poisson and Schrbdinger equations in the silicon inversion layer. For low-frequency noise calculation, both the number induced and correlated mobility-induced perturbations caused by the channel carriers' interactions with the oxide states are considered. The physical parameter, effective oxide trap levels at the semiconductor-insulator interface, is modeled using the Hooge parameter and is correlated with inversion charge of the device. The model has been used to predict the low-frequency noise characteristics of a single-gate (bulk) device, a single-gate (SOI) device and a double-gate (SOI) device.
Library of Congress Subject Headings
Metal oxide semiconductor field-effect transistors--Mathematical models; Electronic circuits--Noise--Mathematical models
Publication Date
2005
Document Type
Thesis
Student Type
Graduate
Degree Name
Electrical Engineering (MS)
Department, Program, or Center
Electrical Engineering (KGCOE)
Advisor
Syed S. Islam
Advisor/Committee Member
James E. Moon
Advisor/Committee Member
Sannasi Ramanan
Recommended Citation
Rai, Shailesh S., "Low Frequency Noise Modeling in Single- and Double-Gate MOSFETs" (2005). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/8131
Campus
RIT – Main Campus
Comments
Physical copy available from RIT's Wallace Library at TK7871.95 .R34 2005