Abstract
As the world of mobile multimedia computing continues to grow, so does the need for small, high performance, low power microchips. The implementation of the software algorithms used in these systems therefore has become an increasingly important issue in more recent applications. In order to realize the goals of our technological society and keep up with the speed at which computing technology is growing, the hardware implementation of these algorithms must be examined. This thesis describes the implementation and system simulation of four image binarization algorithms. The first algorithm is a simple global thresholding algorithm, while the remaining three adapt to the luminescent properties of the image. A high-level design philosophy was utilized throughout the course of the research. Each algorithm was first modeled in MATLAB, implemented and simulated in VHDL, and then synthesized to an FPGA where their operation was tested using a custom PC interface. High-level programming methods were used in both the modeling and VHDL implementations of the algorithms. The algorithms were synthesized to an Altera 20K200E FPGA on the Excalibur NIOS development board. Of the four algorithms, the local thresholding algorithm would not synthesize due to the high-level VHDL loop commands which were utilized in the implementation. The remaining three, global thresholding, running average thresholding, and quick adaptive thresholding were synthesized and written to the target device with 7.12%, 89.76% and 58.52% utilization of the devices on the FPGA respectively. The global thresholding algorithm achieved a clock frequency of 62.1 MHz, running thresholding achieved 17.6 MHz, and quick thresholding obtained a frequency of 21.4 MHz.
Library of Congress Subject Headings
VHDL (Computer hardware description language)--Research; Image processing--Digital techniques--Simulation methods; Mobile computing
Publication Date
2004
Document Type
Thesis
Student Type
Graduate
Degree Name
Computer Engineering (MS)
Department, Program, or Center
Computer Engineering (KGCOE)
Advisor
Kenneth Hsu
Advisor/Committee Member
Andreas Savakis
Advisor/Committee Member
Roy Czernikowski
Recommended Citation
Sardino, Nicholas P., "VHDL implementation and synthesis of adaptive thresholding" (2004). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/6718
Campus
RIT – Main Campus
Comments
Physical copy available from RIT's Wallace Library at TK7885.7 .S27 2004