Abstract

Attempts to introduce a CMP process for copper damascene features at Rochester Institute of Technology were stymied by adhesion failures of the Ta/Cu film stack. This work was undertaken to investigate the effect of stress in the films on adhesion and to develop a viable CMP process for Cu damascene technology. In depth studies of stress as a function of sputter deposition conditions revealed that stress in Ta layers could vary from -1700 MPa compression to +800 MPa tensile for deposition pressures over a range of 2-20 mTorr for films having a nominal thickness of 0.25 μm. For a fixed pressure, stress could vary from -1500 to +800 MPa for thicknesses ranging from 24 to 225 nm. More importantly, target aging was shown to result in a change in stress for fixed deposition parameters, such as pressure and power. Control of the stress in these films is critical as a substantial difference in CMP removal rates for tantalum films having -400 to -1200 MPa of compressive stress was observed. In addition, the top copper layer will adhere to Ta films in a specific range of compressive stress. A 50 nm film stack of TaN/Ta with varying thickness ratios of the two metals was fabricated that exhibited nearly constant compressive stress. This deposition process for the TaN/Ta barrier layer was developed utilizing fixed voltage, not power as the deposition parameter. These studies resulted in a sputter process for TaN/Ta/Cu that exhibited good adhesion to SiO2, both for blanket and patterned films. A copper damascene process has been developed using a film system that adhered well to SiO2. Wafers were characterized for planarity both within die and within wafer, as well as wafer-to-wafer. The most promising deposition and polish processes were employed to produce a metal gate metal oxide semiconductor (MOS) capacitor and characterized by measuring the maximum electric field of the gate oxide before it would break down. The planarized damascene features were achieved that exhibited ≤ 30 nm of topology as viewed by profilometery and AFM. Results of breakdown studies of MOS capacitors were confounded by particulate effects, but the capacitors produced by CMP were on par with sputtered films patterned by photolithography. I would like to express my gratitude to Dr. Michael Jackson for taking me on as his graduate student and for his guidance throughout this project. I am grateful for Dr. Santosh Kurinec, Dr. Richard Lane and Dr. Christopher Hoople for being on my thesis committee and being willing to donate time to answer my questions. I acknowledge Dr. Tom Blanton for his generous donation of XRD analysis and expertise. I also appreciate the help of Daniel Brown for writing a program to perform stress calculations. This endeavor saved a significant amount of time. I give my most sincere appreciation to my father for providing help in numerous ways.

Library of Congress Subject Headings

Cathode sputtering (Plating process); Tantalum films; Copper plating; Adhesion; Copper

Publication Date

2004

Document Type

Thesis

Department, Program, or Center

Microelectronic Engineering (KGCOE)

Advisor

Jackson, Michael

Advisor/Committee Member

Kurinec, Santosh

Advisor/Committee Member

Lane, Richard

Comments

Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TS695 .P47 2004

Campus

RIT – Main Campus

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