Abstract

The recent developments in rapid thermal processing in the past several years have shown it to have much potential in achieving full dopant activation of implanted junctions with a limited amount of junction depth movement. Its application to polysilicon emitter transistors allows for the formation of very shallow emitter-base junctions and narrow base widths with far greater activation capability than conventional furnace processes. A process for polysilicon emiter transistors utilizing rapid thermal annealing has been developed. Furnace processing at 875 C; and rapid thermal processing for 20 seconds at 950 C, 1000 C, and 1050 C was performed to anneal the emitter. Vertical npn transistors with emitter junctions of .1 to .2 microns and base widths smaller than .2 microns were fabricated. The resulting gains were as high as 392 with corresponding early voltages of 165 volts. TEM analysis was also performed to show the effects of RTP.

Library of Congress Subject Headings

Silicon--Electric properties; Bipolar transistors

Publication Date

2-1-1994

Document Type

Thesis

Department, Program, or Center

Electrical Engineering (KGCOE)

Advisor

Names Illegible

Comments

Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK7871.96.B55M38 1994

Campus

RIT – Main Campus

Download

Share

COinS