Abstract

A iow-noise, CCD electrometer is presented that makes use of devices akin to buried-channel, LDD NMOS FETs. Self-aligned source and drain contacts are used that result in high performance and a simplified process. These devices were fabricated in a scaled, buried-channel NMOS CCD process without adding any process complexity. In spite of the higher capacitances associated with the scaled process (higher levels of doping and thinner gate oxides) in which this device was constructed, the input referred voltage responsivity or sensitivity of this electrometer is 15 /xV/electron, the highest reported to date. This high responsivity leads to superior noise performance. At room temperature, the output amplifier's input-referred-noise component is only 7.5 electrons rms over a -3dB bandwidth of 35.9 MHz. The total input-referred noire of this wide-band electrometer is only 7.2 electrons rms, with correlated double-sampling employed to eliminate kTC noise. Therefore, the noise performance has been greatly improved over the current state-of-the-art, floating-diffusion, amplifier-type electrometers.

Library of Congress Subject Headings

Charge coupled devices--Design and construction; Electrometer--Design and construction; Integrated circuits--Design and construction

Publication Date

6-1-1987

Document Type

Thesis

Department, Program, or Center

Electrical Engineering (KGCOE)

Advisor

Name Illegible

Comments

Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK7871.99.C45S73 1987

Campus

RIT – Main Campus

Download

Share

COinS