Abstract

Analog to digital converters play an essential role in modern mixed signal circuit design. Conventional Nyquist-rate converters require analog components that are precise and highly immune to noise and interference. In contrast, oversampling converters can be implemented using simple and high-tolerance analog components. Moreover, sampling at high frequency eliminates the need for abrupt cutoffs in the analog anti-aliasing filters. A noise shaping technique is also used in DS converters in addition to oversampling to achieve a high resolution conversion. A significant advantage of the method is that analog signals are converted using simple and high-tolerance analog circuits, usually a 1-bit comparator, and analog signal processing circuits having a precision that is usually much less than the resolution of the overall converter. In this thesis, a technique to design the discrete time DS converters for 25 kHz baseband signal bandwidth will be described. The noise shaping is achieved using a switched capacitor low-pass integrator around the 1-bit quantizer loop. A latched-type comparator is used as the quantizer of the DS converter. A second order DS modulator is implemented in a TSMC 0.35 µm CMOS technology using a 3.3 V power supply. The peak signal-to-noise ratio (SNR) simulated is 87 dB; the SNDR simulated is 82 dB which corresponds to a resolution of 14 bits. The total static power dissipation is 6.6 mW.

Library of Congress Subject Headings

Modulators (Electronics)--Design and construction; Analog-to-digital converters--Design and construction; Metal oxide semiconductors, Complementary

Publication Date

11-15-2006

Document Type

Thesis

Student Type

- Please Select One -

Department, Program, or Center

Electrical Engineering (KGCOE)

Advisor

Islam, Syed

Advisor/Committee Member

Moon, James

Advisor/Committee Member

Ramanan, Sannasi

Comments

Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK7887.6 .N38 2006

Campus

RIT – Main Campus

Plan Codes

EEEE-MS

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