Abstract
This thesis discusses in detail the steps required for the design of a general purpose Data Acquisition System (D.A.S.). This D.A.S. is called a Synchronous Data Compression System (S.D.C.S.) because of some special features. The S.D.C.S. is designed to accept data in analog or digital form. A simple control panel interface is developed, and areas of prime interest such as input/output interface control, analog-to-digital conversion, data compression, and data sampling modes are discussed in detail. ? The primary logic type used for the S.D.C.S. is the CMOS type 4000 Series which was developed by R.C. A.
Library of Congress Subject Headings
Data transmission systems
Publication Date
2-1-1979
Document Type
Thesis
Student Type
- Please Select One -
Department, Program, or Center
Electrical Engineering (KGCOE)
Department, Program, or Center
Electrical Engineering
College
Kate Gleason College of Engineering
Advisor
Brown, George
Advisor/Committee Member
Salem, E.
Advisor/Committee Member
Thompson, George
Recommended Citation
Calcagno, Joseph, "A Synchronous Data Compression System" (1979). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/4665
Campus
RIT – Main Campus
Comments
Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK5102.5.C24