Troy Brewster

Abstract

Optical character recognition is useful in many aspects of business. However, the use of conventional computers to provide a solution to this problem has not been very effective. Over the past two decades, researchers have utilized artificial neural networks for optical character recognition with considerable success. One such neural network is the neocognitron, a real-valued, multi-layered hierarchical network that simulates the human visual system. The neocognitron was shown to have the capability for pattern recognition despite variations in size, shape or the presence of deformations from the trained patterns. Unfortunately, the neocognitron is an analog network which prevents it from taking full advantage of the many advances in "VLSI technology. Major advances in VLSI technology have been in the digital medium. Therefore, it appears necessary to adapt the neocognitron to an efficient digital neural network if it is to be implemented in VLSI. Recent research has shown that through preprocessing approximations and definition of new model functions, the neocognitron is well suited for implementation in digital VLSI. This thesis uses this methodology to implement a large scale digital neocognitron model. The new model, the digi-neocognitron, uses supervised learning and is trained to recognize ten handwritten numerals with widths of one pixel. The development of the neocognitron and the digi-neocognitron software models, and a comparison of their performance will be discussed. This is followed by the development and simulation of the digital model using the VHSIC Hardware Description Language (VHDL). The VHDL model is used to demonstrate the functionality of the hardware model and to aid in its design. The model functions of the digi-neocognitron are then implemented and simulated for a 1.2 micrometers CMOS process.

Library of Congress Subject Headings

Pattern recognition systems--Design and construction--Computer simulation; Neural networks (Computer science); Integrated circuits--Very large scale integration; VHDL (Computer hardware description language)

Publication Date

5-1-1995

Document Type

Thesis

Department, Program, or Center

Computer Engineering (KGCOE)

Advisor

Brown, George

Advisor/Committee Member

Anderson, Peter

Advisor/Committee Member

Chang, Tony

Comments

Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK7882.P3 B748 1995

Campus

RIT – Main Campus

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