Abstract

One prevailing technology in wireless communication is Multiple Input, Multiple Output (MIMO) communication. MIMO communication simultaneously transmits several data streams, each from their own antenna within the same frequency channel. This technique can increase data bandwidth by up to a factor of the number of transmitting antennas, but comes with the cost of a much higher computational complexity for the wireless receiver. MIMO communication exploits differing channel effects caused by physical distances between antennas to differentiate between transmitting antennas, an intrinsically two dimensional operation. Current Digital Signal Processors (DSPs), on the other hand, are designed to perform computations on one dimensional vectors of incoming data. To compensate for the lack of native support of these higher dimensional operations, current base stations are forced to add multiple new processing elements while many mobile devices cannot support MIMO communication. In order to allow wireless clients and stations to have native support of the two dimensional operations required by MIMO communication, a hardware co-processor was designed to allow the DSP to offload these operations onto another processor to reduce computation time.

Library of Congress Subject Headings

MIMO systems; Wireless communication systems--Design and construction

Publication Date

2-1-2010

Document Type

Thesis

Department, Program, or Center

Computer Engineering (KGCOE)

Advisor

Kwasinski, Andres

Comments

Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK5103.2 .H67 2010

Campus

RIT – Main Campus

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