Abstract
This research is dedicated to advancing catalyst-free epitaxial growth methods for indium arsenide-based nanowires (NWs) on foreign substrates, including silicon and two-dimensional (2D) materials. The findings presented here demonstrate new methods for low-cost III-V semiconductor NW synthesis, manipulation of NW optical properties, and advanced techniques for modulation of NW geometry and composition during selective-area epitaxy (SAE). The first part of this work explores the growth of InAs NWs with sub-lithographic dimensions on reusable Si (111), toward NW membrane-based optoelectronic devices such as infrared photodetectors (IR PDs). A SiO2 masking template is first patterned using i-line photolithography, yielding hexagonal arrays of nanopores. InAs NW arrays are then grown through a novel localized self-assembly (LSA) method using metalorganic chemical vapor deposition (MOCVD). The yield of NWs is optimized through the introduction of a two-step flowrate-modulated growth technique. The NW arrays are embedded in a polymer membrane, delaminated, and transferred to carrier substrates. The process achieves ~100% transfer yields, fully preserving NW position and orientation during transfer. The starting SiO2-templated Si (111) substrates are then reused for LSA growth of subsequent NW generations, demonstrating reproducible global yields of > 85% over wafer-scale areas. This substrate recycling approach aims to reduce the manufacturing costs of III-V NW-based membranes for large-area, flexible, and wearable optoelectronic devices. Next, the influence of an integrated backside reflector on the optical properties of NW-based membranes is investigated. Simulations performed using the rigorous coupled-wave analysis (RCWA) technique are employed to demonstrate significant tunability of the IR absorption spectra of coaxially heterostructured NW arrays, where InAs core segments are partially encapsulated by GaAs0.1Sb0.9 shell layers. The integration of Au backside contact layers creates periodic evanescent fields between adjacent NWs, dependent on the NW core segment diameter and incident light wavelength. By introducing partial GaAs0.1Sb0.9 shell layers with dimensions aligned to the evanescent field, selective absorption of otherwise decoupled light in the 2 to 3 µm range is realized within the InAs NW core segments. This site-specific absorption, which can be engineered as a function of the NW shell segment geometry, offers new opportunities for the development of tunable IR photodetector device structures. Lastly, we introduce a method to locally modulate the effective precursor flowrates during SAE growth by MOCVD in order to manipulate NW dimensions and compositions. Our findings demonstrate a significant growth rate modulation effect, resulting in an eight-fold volumetric enhancement ratio compared to control samples. This technique allows for the fabrication of III-V NWs with adjustable geometries on the same substrate, using only a single nanopore masking pattern. Furthermore, by leveraging the growth rate enhancement effect, we demonstrate the ability to alter the composition of adjacent AlxIn(1-x)As NW arrays within the 0.11 ≤ x ≤ 0.54 range during a single SAE run. This provides new approaches for the growth and fabrication of NW-based optoelectronic devices, particularly beneficial for multispectral photodetector applications.
Library of Congress Subject Headings
Nanowires--Synthesis; Epitaxy; Optoelectronic devices
Publication Date
12-14-2023
Document Type
Dissertation
Student Type
Graduate
Degree Name
Microsystems Engineering (Ph.D.)
Department, Program, or Center
Microsystems Engineering
College
Kate Gleason College of Engineering
Advisor
Parsian Katal Mohseni
Advisor/Committee Member
Stefan F. Preble
Advisor/Committee Member
Seth M. Hubbard
Recommended Citation
Abrand, Alireza, "Catalyst-Free Epitaxy of Core-Shell Nanowire Arrays for Wavelength-Selective and Substrate-Free Optoelectronic Devices" (2023). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/11640
Campus
RIT – Main Campus
Plan Codes
MCSE-PHD