Abstract

Spin based magnetic tunnel junctions (MTJs) consist of two ferromagnetic thin films separated by a nonmagnetic insulating barrier. The MTJ exhibits two switchable resistive states, making them ideal candidates for non-volatile memory. The discovery of high Tunneling Magnetoresistance (TMR) in MgO based MTJs has brought spintronics into the forefronts of modern technology. A device structure CoFeB|MgO|CoFeB achieved by physical vapor deposition (PVD) has revolutionized the hard-drive industry to go beyond densities of gigabyte per square inch. There is increasing interest in the application of these devices toward other technical areas, such as sensors, logic and reconfigurable computing. In these structures, the thicknesses of the layers are in the order of a few nanometers. For integration of these devices in other platforms, particularly on silicon, to augment the well-developed CMOS technology, it is imperative to (1) investigate processing constraints, (2) develop appropriate physical models, and (3) build circuit models for effective circuit implementation. The work presented in this dissertation focuses on these three important aspects for the realization of CoFeB|MgO|CoFeB MTJs on silicon. A systematic annealing study has been carried out to investigate the role of boron in the device structure. It has been shown using electron energy loss spectroscopy (EELS), and 2D x-ray diffraction (2D XRD) that boron diffuses into MgO with an activation energy of 1.3􀂜0.4 eV and facilitates the crystallization of CoFe with (200) out-of-plane oriented crystals, with MgO as a template. The grain size of CoFe has been definitively shown to be smaller than the grain size of MgO, which were otherwise believed to be the same. A process temperature of 385°C has been determined to be the optimum limit of processing. A low temperature (<385°C) process employing standard integrated circuit fabrication techniques has been developed. The partial crystallization of CoFe necessitates the modification of the tunneling model. A new model that combines the Julliëre's, free electron and tight-binding model with the probabilistic distribution of grains on either side of the tunneling barrier has been proposed. This model explains the variation of TMR as a function of temperature in devices made by PVD. A generalized circuit macromodel has been developed representing field-switchable magnetic tunnel junctions (MTJs) characterized by two distinct voltage-dependent resistance values in parallel and antiparallel states. General-purpose subcircuit implementations are designed for a switchable voltage-dependent resistor capable of implementation using any version of SPICE. Transient simulation of a flash-comparator circuit using multiple MTJs in series is successfully demonstrated showing the robustness of the model.

Library of Congress Subject Headings

Integrated circuits--Very large scale integration--Design; Tunneling (Physics); Magnetization

Publication Date

12-1-2009

Document Type

Dissertation

Student Type

Graduate

Degree Name

Microsystems Engineering (Ph.D.)

Department, Program, or Center

Microsystems Engineering (KGCOE)

Advisor

Kurinec, Santosh

Comments

Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK7874.75 .M843 2009

Campus

RIT – Main Campus

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