Ankur Lamoria


Integrated Photonics has revolutionized the semiconductor industry. Silicon waveguides are now compatible with CMOS transistors on the same wafer and these circuits are known as optical integrated circuits. This thesis is a small part of the integrated photonics project, which has an objective of fabrication and characterization of silicon photonic devices at RIT.

The objective of this project was to make a new shallow etch recipe with etch rate of 100 nm/min with STS etcher tool for silicon waveguide fabrication. This shallow etch recipe will be used to develop a waveguide demonstration platform for education in integrated photonics fabrication at RIT. The pseudo bosch process was used to etch the six inch patterned silicon wafers in the ICP/RIE based tool. To control the chamber parameters recipes were designed using the different DOE approaches. The results were analyzed using the SEM (Scanning Electron Microscopy). An etch rate of 100 nm/min giving straight smooth sidewall patterns were observed using the designed etch recipe with RF power (725W), platen power (10W) C4F8 (60sccm), SF6 (19sccm), O2 (10sccm), Argon (40sccm) and a manual APC Mode with 80% pressure, 5mTorr base pressure and 94mTorr pressure trip. Clean recipe is run with O2 (30sccm) for 20 min with 800W RF power and 20W platen at 10Torr pressure. And after it season recipe is run with C4F8(0sccm), SF6(130sccm) O2 (20sccm) and Ar (20sccm) gas flow rates) at 600W RF power and 16W platen power with pressure conditions same as shallow etch recipe for 17min. These runs are needed after every three shallow etch recipe runs to maintain the chamber conditions same. This shallow etch recipe can be used to make waveguides with low losses.

Library of Congress Subject Headings

Wave guides; Integrated optics--Materials

Publication Date


Document Type


Student Type


Degree Name

Microelectronic Engineering (MS)

Department, Program, or Center

Microelectronic Engineering (KGCOE)


Stefan F Preble

Advisor/Committee Member

Dale Ewbank

Advisor/Committee Member

Rob Pearson


Physical copy available from RIT's Wallace Library at QC661 .L36 2016


RIT – Main Campus

Plan Codes