In mixed signal integrated circuits, the role of passives has become increasingly important. In particular, the characterization and implementation of an embedded planar coil inductor presents several challenges. The present work is a comprehensive study of micro inductors that includes analytical modeling, numerical simulation, in-house fabrication processes, circuit implementation in silicon, and RF measurement techniques. Although the inductor is widely integrated on silicon, there is still a need for closed form expressions for inductance and the quality factor. In addition, amongst the numerous commercially available simulation packages, there still is a need to identify the tool that best suits the design and implementation of micro-inductors on silicon. In this work, an analytical model is presented based on a desegmentation technique, which removes segments from a rectangular cavity to create the inductor coil geometry. Defining the Green's function for each segment, the boundary conditions are applied to obtain a closed form expression for the Z matrix from which the inductance and Q have been obtained. For a numerical modeling, Ansoft's High Frequency Structure Simulator (HFSS) is chosen as the preferred tool for an accurate and frequency dependent analysis. Several inductor geometrics have been modeled analytically and have been validated with HFSS where in each case there is excellent agreement. The model has also been successfully applied to irregularly shaped power planes that commonly occur in mixed signal circuits. The present work has established a fabrication process for micro-inductors using technologies available in the Semiconductor and Microsystems Fabrication Laboratory (SMFL) at RIT. A fabrication process has been developed to integrate inductors, transformers, capacitors, and PMOS (P-type Metal Oxide Semiconductor) transistors. Inductors and transformers have been made from copper and imbedded in a thick PECVD SiO₂ film. The process allows for an optional aluminum ground plane under the copper structures. Capacitors have been formed using the gate oxide as a dielectric and heavily doped silicon and aluminum as the electrodes. PMOS transistors have been implemented to control two varieties of LC tank circuits (parallel and series). The final contribution of the present work is establishing RF test methods for measuring inductance, and calculating the quality factor (Q). Experimental RF testing is performed using high frequency Cascade Microtech ground-signal-ground (GSG) probes and the 9100 probe station. Data has been captured using an Agilent 8363B network analyzer with a frequency range from 10 MHz to 40 GHz. A calibration procedure has been developed for a full two port measurement and a methodology has been optimized for measuring the impedance [Z] matrix and the scattering [S] matrix. The imput impedance is extracted from the [Z] matrix and Q has been calculated. There is excellent agreement between experimental results, numerical results from HFSS, and analytical results from the desegmentation technique.

Library of Congress Subject Headings

Mixed signal circuits--Mathematical models; Electric inductors--Mathematical models; Microelectronics--Mathematical models

Publication Date


Document Type


Student Type


Degree Name

Electrical Engineering (MS)

Department, Program, or Center

Electrical Engineering (KGCOE)


Jayanti Venkataraman

Advisor/Committee Member

Santosh Kurinec

Advisor/Committee Member

Syed Islam


Physical copy available from RIT's Wallace Library at Tk7874 .B76 2005


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