Abstract
Equivalent circuit models with closed form expressions, in conjunction with a segmentation technique, have been derived to study three different aspects related to chip-package co-design issues. This technique has been successfully applied to package level discontinuities, chip-package interconnects, and the modeling of transients that affect the performance of an integrated microstrip antenna placed at the RF front end. In each case, circuit models have been developed to include coupling by the use of coupling capacitance and mutual inductance. All circuit elements are defined by closed form expressions. To analyze package level discontinuities various microstrip transmission lines placed in close proximity to each other have been considered. Typical via structures such as the single via connecting signal lines placed on either side of a ground plane, and two-via structures between transmission lines placed on different layers have also been modeled. In each case the S-matrix from the equivalent circuit model compared to that obtained using a full wave simulator shows excellent agreement, thereby establishing the validity of the model. To address chip-package co-design issues associated with RF front end a test bed consisting of a microstrip antenna with an embedded matching network has been implemented in a Multi-Layered Organic (MLO) material. The impact on the antenna's input and radiation characteristics due to neighboring circuitry is found to be significant in both the frequency and time domains. Using the equivalent circuit model the coupling has been characterized and compared with that obtained from a full wave simulator.
Library of Congress Subject Headings
Multichip modules (Microelectronics)--Design and construction; Electronic packaging--Design; Microelectronic packaging
Publication Date
5-1-2003
Document Type
Thesis
Department, Program, or Center
Electrical Engineering (KGCOE)
Advisor
Venkataraman, Jayanti
Advisor/Committee Member
Islam, Syed
Recommended Citation
Bhagat, Maulin, "Equivalent circuit models for package level discontinuities and chip-package intersonnects" (2003). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/5642
Campus
RIT – Main Campus
Comments
Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK7870.15 .B434 2003