Digital images require large amounts of memory to be stored in a computer system. The JPEG compression standard allows the amount of memory storage required by a digital image to be reduced with little to no perceptible loss of image quality. This thesis is a design of an ASIC that implements a decoder of JPEG compressed images. The decoder implements the baseline decoder defined by the JPEG standard with a few exceptions, the most notable being that only grayscale images can be decompressed. With such an ASIC, the speed of decompressing images is greatly increased. The decoder was designed by writing VHDL source code, which in turn was used to synthesize the ASIC using standard cells.

Library of Congress Subject Headings

Image compression; Image processing--Digital techniques; VHDL (Computer hardware description language)

Publication Date


Document Type


Department, Program, or Center

Computer Engineering (KGCOE)


Brown, George


Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TA1637 .C376 1994


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