This work presents a pipelined VHDL implementation of the inverse lapped biorthogonal transform used in the decompression process of the soon to be released JPEG-XR still image standard format. This inverse transform involves integer only calculations using lifting operations and Kronecker products. Divisions and multiplications by small integer coefficients are implemented using a bit shift and add technique resulting in a multiplier-less implementation with 736 instances of addition. When targeted to an Altera Stratix II FPGA with a 50 MHz system clock, this design is capable of completing the inverse transform of an 8400 x 6600 pixel image in less than 70 ms.

Library of Congress Subject Headings

JPEG (Image coding standard)--Data processing; Image compression--Standards--Data processing; VHDL (Computer hardware description language)

Publication Date


Document Type


Department, Program, or Center

Computer Engineering (KGCOE)


Hsu, Kenneth


Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TA1637 .F736 2009


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