The focus of this thesis is to investigate a media access priority mechanism for a buffer insertion network so that it is better suited for use in real-time applications. This is done by examining a popular priority mechanism present in the IEEE 802.4 token bus standard, and Fiber Distributed Data Interface (FDDI) standard. Mathematical models for throughput and delay are presented for the IEEE 802.4 priority mechanism. These models are then used as a basis for developing the priority mechanism for the buffer insertion ring. Models for throughput and delay are also presented for the buffer insertion priority scheme so that the two media access techniques may be compared.

Library of Congress Subject Headings

Computer network protocols; Local area networks (Computer networks)

Publication Date


Document Type


Department, Program, or Center

Computer Engineering (KGCOE)


Czemlkowski, Roy

Advisor/Committee Member

Hellotis, James

Advisor/Committee Member

Chang, Tony


Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK5105.7.032 1992


RIT – Main Campus