The design of CMOS variable gain amplifier (VGA) with digital control is presented in this project. The first stage of VGA is a two-stage op-amp connected in a voltage follower configuration with a series of resistors and transmission gates at the output followed by the second stage which consists of a two stage Op-amp in parallel with a series of transmission gates and resistors which is used to control the gain of the circuit. The two-stage op amp is designed using gm/Id methodology. The gain of this two-stage op amp is 80.34 dB, phase margin is 94.58º, input common mode range (ICMR) range is from −893.21 mV to 894.22 mV, output swing is from −888.34 mV to 872.13 mV. The gain of the variable gain amplifier ranges from -28.99 dB to 28.62 dB with power consumption of 6.80989512e−11W. The simulation is performed using Cadence Virtuoso in 45nm technology with a supply voltage range of +900 mV to −900 mV.

Publication Date


Document Type

Master's Project

Student Type


Degree Name

Electrical Engineering (MS)

Department, Program, or Center

Electrical Engineering (KGCOE)


Mark A. Indovina

Advisor/Committee Member

Ferat Sahin


RIT – Main Campus