The purpose of this paper is to describe the design and the process used to fabricate NMOS devices. The goal of the experiment was to design and build the smallest NMOS transistor that has been fabricated in the SMLF manufacturing facility. A NMOS transistor is short for n-channel metal oxide silicon field effect transistor (NMOSFET or NMOS). NMOS uses electrons as the majority carrier, a major advantage in terms of device speed. The educational reasons for doing this experiment is to prove the viability of the Canon, being able to complete multi-layer aligning and to increase RIT’s ability to process smaller devices.
"0.5 μ NMOS Devices: Process and Fabrication,"
Journal of the Microelectronic Engineering Conference: Vol. 12:
1, Article 15.
Available at: https://repository.rit.edu/ritamec/vol12/iss1/15